ICS-2020 conference program

With the transition to a virtual conference, the general co-chairs, program co-chairs and workshops and tutorials co-chairs developed a conference program organized to maximize participation across a wide range of time zones.

  • Two workshops and two tutorials during the first day of ICS-2020, developed as live events through parallel Zoom webinar sessions.
  • Three keynote sessions organized as live events through a Zoom webinar session.
  • Seven paper sessions organized as a combination of recorded and live events. For the recorded part, the authors provided a video that was available a week before the conference days from this program page. The live part of the paper sessions was organized as a combination of short presentations for each paper (5 minutes per paper) and a discussion for all the papers presented in the session. Attendees to the session were expected to listen first to the recorded presentations. The live sessions were organized as Zoom webinars.
  • And a final panel session, also organized as a live Zoom webinar.

From this page, you can access to the pre-recorded presentations for conference papers as well as to the recorded webinars for workshops and conference sessions.


All times are Central European Summer Times (CEST)

Workshops program

June 29th, 2020

Workshop on RISC-V and OpenPOWER
Organizer: John Davis (BSC)
Workshop on Heterogeneous Memory Systems Video1 Video2
Organizers: Harald Servat (Intel) and Toni Peña (BSC)

Tutorials program

June 29th, 2020

MUSA Tutorial: A Tool for Design-Space Exploration of Large-Scale HPC Machine
Organizers: Adrià Armejach, Miquel Moretó and Marc Casas (BSC)
Xilinx Tutorial: Developing HPC accelerators using Xilinx FPGAs
Organizer: Cathal McCabe (Xilinx Dublin)

Conference program

June 30th, 2020

15:00-15:15 Welcome
15:15-16:15 Session 1 - Algorithms/ Applications keynote: Computing, Data and COVID-19. Katherine A. Yelick (chair: Eduard Ayguadé)
16:15-16:25 Short break
16:25-17:25 Session 2 - Algorithms I (chair: Carla Osthoff)
A Scalable Framework for Solving Fractional Diffusion Equations Max Carlson, Robert M. Kirby and Hari Sundar
CFDNet: A deep learning-based accelerator for fluid simulations Octavi Obiols-Sales, Abhinav Vishnu, Nicholas Malaya and Aparna Chandramowlishwaran
Fast Distributed Bandits for Online Recommendation Systems Kanak Mahadik, Qingyun Wu, Shuai Li and Amit Sabne
Wavefront Parallelization of Recurrent Neural Networks on Multi-core Architectures Robin Kumar Sharma and Marc Casas
NV-Group: Link-Efficient Reductions for Distributed Deep Learning on Modern Dense GPU Systems
Ching-Hsiang Chu, Pouya Kousha, Ammar Awan, Kawthar Shafie Khorassani, Hari Subramoni and Dhabaleswar K. Panda
TensorSVM: Accelerating Kernel Machines with Tensor Engine Shaoshuai Zhang, Ruchi Shah and Panruo Wu
17:25-18:25 Session 3 - Algorithms II (chair: Manuel Prieto-Matias)
A Coordinate-Oblivious Index for High-Dimensional Distance Similarity Searches on the GPU Brian Donnelly and Michael Gowanlock
V-Combiner: Speeding-up Iterative Graph Processing on a Shared-MemoryPlatform with Vertex Merging Azin Heidarshenas, Serif Yesil, Dimitrios Skarlatos, Sasa Misailovic, Adam Morrison and Josep Torrellas
Efficient Parallel Algorithms for Betweenness- and Closeness-Centrality in Dynamic Graphs Kshitij Shukla, Sai Charan Regunta, Sai Harsh Tondomker and Kishore Kothapalli
Parallelizing Pruned Landmark Labeling: Dealing with Dependencies in Graph Algorithms Ruoming Jin, Zhen Peng, Wendell Wu, Feodor Dragan, Gagan Agrawal and Bin Ren
cuRipples: Influence Maximization on Multi-GPU Systems Marco Minutoli, Maurizio Drocco, Mahantesh Halappanavar, Antonino Tumeo and Ananth Kalyanaraman
Graptor: Efficient Pull and Push Style Vectorized Graph Processing Hans Vandierendonck

July 1st, 2020

15:00-16:00 Session 4 - Architecture keynote: Post-Moore Server Architecture. Babak Falsafi (chair: Rosa M. Badia)
16:00-16:10 Short break
16:10-17:00 Session 5 - Architecture I (chair: Greg Byrd)
SB-Fetch: Synchronization Aware Hardware Prefetching for Chip Multiprocessors Laith M. Albarakat, Paul V. Gratz and Daniel A. Jimenez
RICH: Implementing Reductions in the Cache Hierarchy Vladimir Dimić, Miquel Moretó, Marc Casas, Jan Ciesko and Mateo Valero
AMOEBA: A Coarse Grained Reconfigurable Architecture for Dynamic GPU Scaling Xianwei Cheng, Hui Zhao, Mahmut Kandemir, Beilei Jiang and Gayatri Mehta
SNUG:  Architectural  Support  for  Relaxed  Concurrent  Priority  Queueingin Chip Multiprocessors. Azin Heidarshenas, Tanmay Gangwani, Serif Yesil, Adam Morrison and Josep Torrellas
Sparse-TPU: Adapting Systolic Arrays for Sparse Matrices. Xin He, Subhankar Pal, Aporva Amarnath, Siying Feng, Dong-Hyeon Park, Austin Rovinski, Haojie Ye, Yuhan Chen, Ronald Dreslinski and Trevor Mudge
17:00-18:00 Session 6 - Architecture II (chair: Philippe Navaux)
Bundlefly: A Low-Diameter Topology for Multicore Fiber Fei Lei, Dezun Dong, Xiangke Liao and Jose Duato
Global Link Arrangement for Practical Dragonfly Zaid Salamah A Alzaid, Saptarshi Bhowmik, Xin Yuan and Mickael Lang
Fuzzy Fairness Controller for NVMe SSDs Shivani Tripathy, Debiprasanna Sahoo, Manoranjan Satpathy and Madhu Mutyam
Leveraging Intra-page Update Diversity for Mitigating Write Amplification in SSDs Imran Fareed, Mincheol Kang, Wonyoung Lee and Soontae Kim
CSB-RNN: A Faster-than-Realtime RNN Acceleration Framework with Compressed Structured Blocks Runbin Shi, Peiyan Dong, Tong Geng, Yuhao Ding, Xiaolong Ma, Hayden So, Martin Herbordt, Ang Li and Yanzhi Wang
BurstZ: A Bandwidth-Efficient Scientific Computing Accelerator Platform for Large-Scale Data Gongjin Sun, Seongyoung Kang and Sang-Woo Jun
18:00-19:00 Session 7 - Performance (chair: Antonino Tumeo)
Tools for top-down performance analysis of GPU-accelerated applications Keren Zhou, Mark Krentel and John Mellor-Crummey
Identifying and (automatically) remedying performance problems in CPU/GPU applications Benjamin Welton and Barton Miller
AutoParBench: A Unified Test Framework for OpenMP-based Parallelizers Gleison Souza Diniz Mendonça, Chunhua Liao and Fernando Magno Quintão Pereira
A characterization and identification of HPC applications at leadership computing facility Zhengchun Liu, Ryan Lewis, Rajkumar Kettimuthu, Kevin Harms, Philip Carns, Nageswara Rao, Ian Foster and Michael Papka
End-to-end Performance Modeling of Distributed GPU Applications Jaemin Choi, David Richards, Laxmikant Kale and Abhinav Bhatele
Fast, Accurate, and Scalable Memory Modeling of GPGPUs using Reuse Profiles Yehia Arafa, Abdel-Hameed Badawy, Gopinath Chennupati, Atanu Barai, Nandakishore Santhi and Stephan Eidenbenz

July 2nd, 2020

15:00-16:00 Session 8 - Compilers and languages keynote: Optimizing Supercompilers for Supercomputers. Michael Wolfe (chair: Peter Hofstee)
16:00-16:10 Short break
16:10-17:10 Session 9 - Runtime (chair: Lucia Drummond)
Mapping and Scheduling HPC Applications for optimizing I/O Jesus  Carretero,  Emmanuel  Jeannot,  Guillaume  Pallez,  David  ExpositoSingh, and Nicolas Vidal
Modeling and Optimizing NUMA Effects and Prefetching with Machine Learning Isaac Sánchez Barrera, David Black-Schaffer, Marc Casas, Miquel Moretó, Anastasiia Stupnikova and Mihail Popov
How I Learned to Stop Worrying about User-Visible Endpoints and Love MPI Rohit Zambre, Aparna Chandramowlishwaran and Pavan Balaji
Accelerating Relax-ordered Task-parallel Workloads using Multi-Level Dependency Checking Masab Ahmad, Akif Rehman, Mohsin Shan and Omer Khan
Tuning Applications for Efficient GPU Offloading to In-Memory Processing Yudong Wu, Mingyao Shen, Yi Hui Chen and Yuanyuan Zhou
Ouroboros: Virtualized Queues for Dynamic Memory Management on GPUs Martin Winter, Daniel Mlakar, Mathias Parger and Markus Steinberger
17:10-18:00 Session 10 - Compilers (chair: Dimitrios Nikolopoulos)
MKPipe: A Compiler Framework for Optimizing Multi-Kernel Workloads in OpenCL for FPGA Ji Liu, Abdullah-Al Kafi, Xipeng Shen and Huiyang Zhou
Chunking Loops with non-Uniform Workloads Indu K and V. Krishna Nandivada
Compiler Aided Checkpointing using Crash-Consistent Data Structures in NVMM Systems Tyler Coy, Shuibing He, Bin Ren and Xuechen Zhang
What Every Scientific Programmer Should Know About Compiler Optimizations? Jialiang Tan, Shuyin Jiao, Milind Chabbi and Xu Liu
CodeSeer: Input-dependent Code Variants Selection Via Machine Learning Tao Wang, Nikhil Jain, David Boehme, David Beckingsale, Frank Mueller and Todd Gamblin
18:00-18:10 Short break
18:10-19:10 Session 11 - Panel session: featured Interview Yale Patt (chair: Wen-mei Hwu)
19:10-19:25 Conclusions